Digital design with combinatorial gates like AND, OR, and NOT gates is relatively straightforward. In particular, when you use these gates to form combinatorial logic, the outputs only depend on the ...

The 74HC73 is a dual JK flip-flop with reset and negative edge trigger. This device features individual J, K, clock (nCP) and reset (nR) inputs; also complementary nQ and nQ outputs. It complies with ...

Last time I talked about how to create an adder in Verilog with an eye to putting it into a Lattice iCEstick board. The adder is a combinatorial circuit and didn’t use a clock. This time, we’ll finish ...

The HEF4013B is a D-type flip-flop with dual channel. This device is using a fully static operation and features 5 V, 10 V, and 15 V parametric ratings. It is also tolerant of slow clock rise and fall ...