Pattern matching (PM) was first introduced as the semiconductor industry began to shift from simple one-dimensional rule checks to the two-dimensional checks required by sub-resolution lithography.

This paper presents a Design Rights Management methodology used in a practical EDA tool suite: IP-Idol, developed by the start-up Algodone, based in Montpellier-France. It consists to encrypt and ...

The development of a new product requires constant changes and enhancements to meet the demands of an expectant marketplace. In a modern System-on-Chip (SoC) design, there are a significant number of ...

In today’s complex system-on-chip (SoC) design flows, intellectual property (IP) blocks are everywhere—licensed from third parties, leveraged from internal libraries, or hand-crafted by expert teams.

Both scan automated test pattern generation (ATPG) patterns and IJTAG patterns 1,2,3 are created for a piece of logic that is part of a much larger design. For both, the patterns are independent from ...

Despite the work done by various standards groups such as the VSIA, GSA IP group, and SPIRIT, IP integration still remains quite challenging. First, one has to select the right IP business model, ...

We’ll let you decide: “Is it an IP test evolution or revolution?” Whatever the outcome, change is afoot on the way to develop test, supply test to others, reuse test, integrate test features, validate ...